The embedded world will undergo a transformation unprecedented in design and manufacture, all of these developments are enabled by advances in electronics and Embedded software. As a result, the management of scale and complexity becomes increasingly difficult. There is a need to deliver more complex specifications, with higher quality, in faster time frames and at lower cost and the implications of errors surfacing in later stages of the development cycle are becoming increasingly significant. Current tools available in the market such as Requirements Management tools bring traceability and versioning capabilities and MBSE tools help capture the architecture and use cases of complex systems. However, most of the defects are introduced very early while still in the requirement phase but are detected much later on, generating extremely costly iterations of the development cycle, which, in turn, creates rework, delays and additional costs. Given the increased system complexities, uncovering these defects is becoming ever more difficult A new approach must be used to meet these challenges. The verification of requirements is a necessity and requires advanced computer science techniques whilst being accessible to engineers without any formal methods background to ease the transformation of development organizations. We will present a very innovative approach that allows us to keep on writing textual functional requirements using a formalism close to natural language to ease the adoption by system engineers, whilst this language has formal semantics allowing powerful simulation and validation capabilities. Missing, conflicting and erroneous requirements can be detected early on to avoid injecting those errors into the development process. Functional safety can also benefit from such a modern approach as safety requirements can be captured in Observers to detect safety violations during the requirements simulations. As functional requirements are to become test objectives, new test automation possibilities become available when they are formally defined. The use of formalized functional requirements and test scenarios enables a generation of numerous test vectors, to stimulate the implementation (manual code or an FMU generated by tools such as Simulink) which can be compared with the formalized functional requirements. This means that completely automated functional tests can be performed. Eventually, at the last validation step when the integrated system is tested in a Hardware-In-the-Loop (HIL) test environment, the common approach is to record the inputs and outputs of the system under test and to analyse this result file to verify if the requirements have been violated. Confronting test results files that have a huge number of informal, ambiguous requirements is a very difficult challenge. Organizations spend huge efforts and have to limit the number of requirements that are actually verified. The hardware-In-the-Loop tests cannot be effective if the functional requirements are written using natural language. On the opposite, if the requirements have been formalised then the analysis of the HIL test log files becomes possible allowing much stronger and faster verifications at a stage where traditionally everything is difficult and costly. These end-end-end verification possibilities are already in use in many embedded systems development projects, we will present some impressive results that have been achieved during these last years. Requirements engineering is no longer limited to requirements management. System engineers can author, test and validate functional requirements before they are used as inputs in the following development activities. Functional tests can be automated in a completely innovative manner leading to higher-quality products and smaller maintenance costs.