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An MBSE-enabled Framework to Explore Flight Testing Procedures for UAS Noise Certification

 

An MBSE-enabled Framework to Explore Flight Testing Procedures for UAS Noise Certification

The rapidly growing Unmanned Aerial Systems (UAS) vehicle category with applications across a wide variety of configurations and mission profiles is introducing challenges in ensuring that applicable noise certification regulations are met. A framework is proposed for assessing regulatory compliance to noise standards, and for analyzing process effectiveness as well as outcomes of noise testing campaigns for Unmanned Aerial Systems (UAS). The objective of this capability is to drive improvements at the process level of noise certification through exploration and evaluation of alternative noise testing technologies and procedures. This framework is enabled by a Model-based systems Engineering (MBSE) workflow for creating verification models that represent requirements derived by applicable regulations under the CFR Part 36 noise certification (appendices J, H). As a digital thread-enabled approach, this environment allows for tracking and assessing adherence to noise regulatory practices through mapping noise data flows from test campaigns to metrics of interest as part of verification of meeting regulatory noise requirements. The assessment of improvement strategies and selection of testing procedures is demonstrated through case studies performed by small multi- rotor vehicles and operated for package delivery missions.


S​peaker

Dr. Michael Balchanos, Senior Research Engineer, Digital Engineering Division at Aerospace Systems Design Laboratory (ASDL) Defense & Space Divisions

Dr. Michael Balchanos is a Senior Research Engineer with the Daniel Guggenheim School of Aerospace Engineering at Georgia Tech, where he serves under the Digital Engineering and Defense & Space Divisions at the Aerospace Systems Design Laboratory (ASDL). His main area of expertise includes dynamic systems modeling and simulation methods in support of digital twin-enabled applications, as well as SoS-level integration techniques for resilient systems design. Dr. Balchanos is a member of AIAA’s Digital Engineering Integration Committee (DEIC), AIAA’s Space Exploration Integration and Outreach Committee (SEIOC), the AIAA’s Cislunar Economy Task Force (CETF) and he also serves on the NAFEMS Americas Planning Committee. Dr. Balchanos obtained his Diploma in Physics from the Aristotle University of Thessaloniki, Greece, and his M.Sc. and Ph.D. degrees in Aerospace Engineering from Georgia Tech.

Document Details

Referencew_oct_24_global_1_p
AuthorsBalchanos. M
LanguageEnglish
AudiencesAnalyst Manager
TypePresentation
Date 10th October 2024
OrganisationsASDL
RegionGlobal

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